1. Field of the Invention
The present invention relates generally to the design of integrated circuits. More particularly, the present invention relates to the design of integrated circuits having more than one type of memory.
2. State of the Art
Memory devices such as random access memories (RAMS) or read only memories (ROMS) have been readily available for some time. For example, these memories are described in Microelectronics Digital and Analog Circuits and Systems, by Jacob Millman, Ph.D, 1979: McGraw-Hill. ROMs are non-volatile read only devices, while RAMs are volatile read and write devices. Both types of memory devices are typically designed as arrays of memory cells with decoding and control circuitry located about their peripheries.
A typical RAM cell is formed as a flip-flop wherein two inverters are cross-coupled. A typical ROM cell, by way of contrast, is formed by a single bipolar or MOS transistor to establish a logic "0" state or alternately, is formed as an open circuit to establish a logic "1" state. Thus, individual ROM cells are approximately one-tenth the size of individual RAM cells.
Decoding circuitry permits a particular row and column of the memory array to be addressed. For example, a row decoder decodes an input address to access a particular row of cells in the memory cell array. A column decoder decodes an input address to control a multiplexer that selectively accesses a column in the memory cell array. Thus, a cell located at the intersection of an addressed row and column can be selectively accessed.
Control circuitry provides selective input/output control of the memory array. For example, a RAM includes read/write control circuitry for selectively enabling the output (i.e., read) or input (i.e., write) of data from or into an addressed cell or series of cells.
Quite often circuit layouts are designed wherein plural types of memory are necessary to optimize circuit operation, cost-effectiveness or space requirements. For example, a non-volatile ROM device might be used to store the basic operating instructions or program of a microprocessor included in the circuit layout. Because ROMs are non-volatile storage devices, they retain information stored therein even in the absence of circuit power. On the contrary, a volatile RAM might be used by the microprocessor for writing and reading information and data obtained during program execution.
Typically, a circuit designed to include plural types of memory is fabricated by acquiring a discrete component for each type of memory device. For example, a RAM chip and a separate ROM chip are placed on a printed circuit board and interconnected with other circuit components.
More recently, application specific integrated circuits (ASICs) have been developed whereby different types of memory devices are formed as part of one integrated circuit (e.g., formed on a single substrate). In designing ASICs which require plural types of memory, each type of memory is typically formed as an individual area on the ASIC. For example, if an ASIC is to include both a RAM and a ROM, the ASIC is designed to include an array of RAM cells surrounded by RAM decode and control circuitry. An array of ROM cells is separately designed with its own decode and control circuitry.
The foregoing ASIC designs suffer significant drawbacks which limit their effective use of substrate space on an ASIC. For example, because an individual RAM cell is typically ten times larger than an individual ROM cell, circuit layouts have been designed with reduced RAM memory for saving space.
However, circuit layout designs with minimized RAM and increased ROM possess significant disadvantages. In addition to losing read and write capability, such designs cannot effectively expolit the aforementioned space savings during placement and routing of the circuit layout.
For example, because ROM cells are relatively small, ROM decoder and control circuitry represents a relatively large fraction of the ROM's overall space requirements. Larger ROMs tend to be relatively long and narrow with row decoder circuitry located along one side. Such an irregular configuration must be one of the first circuit components placed by a compiler into the circuit layout design. Subsequent placement of other circuit components is severely restricted, often resulting in increased overall dimensions of the ASIC.
Accordingly, circuit layouts are designed by estimating the amount of RAM space required. However, the flexibility of ASIC designs is limited when an exact amount of available RAM or ROM space is pre-allotted to promote efficient use of a substrate area. Pre-allocation of memory space may result in a memory shortage, thus limiting application of the circuit layout.
Additional RAM space is therefore often included in a circuit layout design to account for unexpected memory requirements which may occur during subsequent use of the circuit layout. Valuable circuit layout space may therefore be wasted by providing additional memory space and attendant decoder and control circuitry which is never actually used.
Accordingly, there is a need for ASIC designs that more effectively place memory in available circuit layout space and that offer enhanced flexibility without limiting applicability of the circuit layout.